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5-521 fast and ls ttl data octal transparent latch with 3-state outputs; octal d-type flip-flop with 3-state output the sn54 / 74ls373 consists of eight latches with 3-state outputs for bus organized system applications. the flip-flops appear transparent to the data (data changes asynchronously) when latch enable (le) is high. when le is low, the data that meets the setup times is latched. data appears on the bus when the output enable (oe ) is low . when oe is high the bus output is in the high impedance state. the sn54 / 74ls374 is a high-speed, low-power octal d-type flip-flop fea - turing separate d-type inputs for each flip-flop and 3-state outputs for bus ori - ented applications. a buf fered clock (cp) and output enable (oe) is common to all flip-flops. the sn54 / 74ls374 is manufactured using advanced low power schottky technology and is compatible with all motorola ttl families. ? eight latches in a single package ? 3-state outputs for bus interfacing ? hysteresis on latch enable ? edge-triggered d-type inputs ? buffered positive edge-triggered clock ? hysteresis on clock input to improve noise margin ? input clamp diodes limit high speed termination effects pin names loading (note a) high low d 0 d 7 le cp oe o 0 o 7 data inputs latch enable (active high) input clock (active high going edge) input output enable (active low) input outputs (note b) 0.5 u.l. 0.5 u.l. 0.5 u.l. 0.5 u.l. 65 (25) u.l. 0.25 u.l. 0.25 u.l. 0.25 u.l. 0.25 u.l. 15 (7.5) u.l. notes: a) 1 ttl units load (u.l.) = 40 m a high/1.6 ma low. b) the output low drive factor is 7.5 u.l. for military (54) and 25 u.l. for commercial (74) t emperature ranges. the output high drive factor is 25 u.l. for military (54) and 65 u.l. for commercial (74) t emperature ranges. connection diagram dip (top view) sn54 / 74ls373 sn54 / 74ls374

note: the flatpak version has the same pinouts (connection diagram) as the dual in-line package. sn54/74ls373 sn54/74ls374 octal transparent latch with 3-state outputs; octal d-type flip-flop with 3-state output low power schottky ordering information sn54lsxxxj ceramic sn74lsxxxn plastic sn74lsxxxdw soic 20 1 j suffix ceramic case 732-03 20 1 n suffix plastic case 738-03 20 1 dw suffix soic case 751d-03
5-522 fast and ls ttl data sn54/74ls373 ? sn54/74ls374 truth table ls373 d n le oe o n h h l h l h l l x l l q 0 x x h z* ls374 d n le oe o n h l h l l l x x h z* h = high voltage level l = low voltage level x = immaterial z = high impedance * note: contents of flip-flops unaf fected by the state of the output enable input (oe ). logic diagrams sn54ls / 74ls373 sn54ls / 74ls374

guaranteed operating ranges symbol parameter min typ max unit v cc supply voltage 54 74 4.5 4.75 5.0 5.0 5.5 5.25 v t a operating ambient temperature range 54 74 55 0 25 25 125 70 c i oh output current e high 54 74 1.0 2.6 ma i ol output current e low 54 74 12 24 ma
5-523 fast and ls ttl data sn54/74ls373 ? sn54/74ls374 dc characteristics over operating temperature range (unless otherwise specified) symbol parameter limits unit test conditions symbol parameter min typ max unit test conditions v ih input high voltage 2.0 v guaranteed input high voltage for all inputs v il input low voltage 54 0.7 v guaranteed input low voltage for all inputs v il input low voltage 74 0.8 v guaranteed input low voltage for all inputs v ik input clamp diode voltage 0.65 1.5 v v cc = min, i in = 18 ma v oh output high voltage 54 2.4 3.4 v v cc = min, i oh = max, v in = v ih or v il per truth table v oh output high voltage 74 2.4 3.1 v v cc = min, i oh = max, v in = v ih or v il per truth table v ol output low voltage 54, 74 0.25 0.4 v i ol = 12 ma v cc = v cc min, v in = v il or v ih per truth table v ol output low voltage 74 0.35 0.5 v i ol = 24 ma v in = v il or v ih per truth table i ozh output off current high 20 m a v cc = max, v out = 2.7 v i ozl output off current low 20 m a v cc = max, v out = 0.4 v i ih input high current 20 m a v cc = max, v in = 2.7 v i ih input high current 0.1 ma v cc = max, v in = 7.0 v i il input low current 0.4 ma v cc = max, v in = 0.4 v i os short circuit current (note 1) 30 130 ma v cc = max i cc power supply current 40 ma v cc = max note 1: not more than one output should be shorted at a time, nor for more than 1 second. ac characteristics (t a = 25 c, v cc = 5.0 v) symbol parameter limits unit test conditions symbol parameter ls373 ls374 unit test conditions symbol parameter min typ max min typ max unit test conditions f max maximum clock frequency 35 50 mhz c l = 45 pf, r l = 667 w t plh t phl propagation delay, data to output 12 12 18 18 ns c l = 45 pf, r l = 667 w t plh t phl clock or enable to output 20 18 30 30 15 19 28 28 ns c l = 45 pf, r l = 667 w t pzh t pzl output enable time 15 25 28 36 20 21 28 28 ns t phz t plz output disable time 12 15 20 25 12 15 20 25 ns c l = 5.0 pf ac setup requirements (t a = 25 c, v cc = 5.0 v) symbol parameter limits unit symbol parameter ls373 ls374 unit symbol parameter min max min max unit t w clock pulse width 15 15 ns t s setup time 5.0 20 ns t h hold time 20 0 ns definition of terms setup time (t s ) e is defined as the minimum time required for the correct logic level to be present at the logic input prior to le transition from high-to-low in order to be recognized and transferred to the outputs. hold time (t h ) e is defined as the minimum time following the le transition from high-to-low that the logic level must be maintained at the input in order to ensure continued recognition.
ac waveforms figure 1
figure 2 figure 3 w
figure 4 switch positions * includes jig and probe capacitance. ac load circuit 5-524 fast and ls ttl data sn54/74ls373 symbol sw1 sw2 t pzh open closed t pzl closed open t plz closed closed t phz closed closed
ac waveforms figure 6 w
figure 8 switch positions * includes jig and probe capacitance. ac load circuit
figure 5 figure 7 5-525 fast and ls ttl data sn54/74ls374 symbol sw1 sw2 t pzh open closed t pzl closed open t plz closed closed t phz closed closed
5-526 fast and ls ttl data "! ! " ! & " ! "
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5-527 fast and ls ttl data symbol sw1 sw2 t pzh open closed t pzl closed open t plz closed closed t phz closed closed motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability , including without limitation consequential or incidental damages. at ypicalo parameters can and do vary in dif ferent applications. all operating parameters, including at ypicalso must be validated for each customer application by customer ' s technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur . should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly , any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/af firmative action employer . literature distribution centers: usa: motorola literature distribution; p .o. box 20912; phoenix, arizona 85036. europe: motorola ltd.; european literature centre; 88 t anners drive, blakelands, milton keynes, mk14 5bp , england. jap an: nippon motorola ltd.; 4-32-1, nishi-gotanda, shinagawa-ku, t okyo 141, japan. asia p acific: motorola semiconductors h.k. ltd.; silicon harbour center , no. 2 dai king street, t ai po industrial estate, t ai po, n.t., hong kong. ?

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